TSMC N2

TSMC N2 is TSMC's 2-nanometer process family and the company's first production logic generation to use nanosheet transistors.

It entered high-volume manufacturing in the fourth quarter of 2025 and began contributing to TSMC wafer revenue in 2026. [S2][S6][S8]

Explain It in 30 Seconds

N2 is not a chip that TSMC sells under its own brand.

It is a manufacturing technology that customers use to build their own chips.

The most important architectural change is the move from FinFET transistors to nanosheet transistors.

The commercial purpose is familiar:

more performance
and/or
less power
and/or
more useful transistor density

But the engineering method changes because older transistor structures become harder to scale efficiently.

Where N2 Sits in TSMC

Customer chip design
↓
TSMC design enablement
↓
N2 process technology
↓
wafer fabrication
↓
packaging / 3DFabric options
↓
customer product

N2 sits at the wafer-fabrication technology layer.

It is upstream of packaging technologies such as CoWoS and SoIC.

The Problem N2 Solves

For decades, semiconductor performance improved by making transistors smaller and packing more of them into a given area.

That becomes harder at advanced nodes.

Engineers face problems including:

  • leakage;
  • power density;
  • electrostatic control;
  • interconnect resistance;
  • manufacturing complexity.

N2 introduces TSMC's first-generation nanosheet transistor technology to continue power, performance and density improvement. [S2][S8]

How It Works — Simple Version

A FinFET transistor wraps the gate around three sides of a vertical fin.

A nanosheet transistor surrounds horizontal semiconductor sheets more completely.

The simple idea is:

better gate control
↓
more efficient transistor switching
↓
continued scaling at advanced nodes

The customer does not need to manufacture the transistor itself.

TSMC develops the process, design rules and manufacturing flow. The customer designs a chip to those rules.

Before N2 / After N2

Before N2

TSMC's leading logic generations used FinFET structures, including N3.

N2

TSMC moves to nanosheet transistors.

What changes commercially

The node gives customers another generation of power/performance/density improvement while keeping TSMC's foundry relationship the same:

customer owns chip design
TSMC owns process technology and manufacturing execution

Who Uses N2?

The main target applications include:

  • high-performance computing;
  • smartphones;
  • advanced AI and compute products.

TSMC's 2025 Annual Report says N2 was developed for advanced smartphone, HPC and AI applications and entered high-volume manufacturing as planned. [S2]

What N2 Depends On

N2 requires more than a transistor architecture.

It depends on:

  • advanced lithography;
  • process-control equipment;
  • ultra-pure materials;
  • design-rule development;
  • EDA support;
  • process-design kits;
  • high manufacturing yield;
  • customer tape-outs;
  • packaging for many large HPC products.

This is why a process node is a manufacturing ecosystem, not only a transistor diagram.

What Depends On N2?

Products designed specifically for N2 depend on TSMC's ability to:

  • maintain the process;
  • improve yield;
  • expand capacity;
  • support design tools and IP;
  • move wafers into packaging and testing.

The commercial risk of a new node is therefore shared across customer design schedules and TSMC's manufacturing ramp.

Why N2 Matters to TSMC

N2 matters in three ways.

1. New transistor architecture

It begins TSMC's nanosheet era.

2. Customer migration

Leading-edge customers must decide whether and when to move major products to the new family.

3. Capacity economics

New-node fabs require large investment before the customer volume fully arrives.

TSMC's Q2 2026 materials show 2nm already contributing 3% of wafer revenue, while management described a steep second-half ramp. [S6][S7]

Key Milestones

2024–2025 — Development and customer preparation

TSMC continued yield and performance development while customers prepared designs.

Q4 2025 — High-volume manufacturing

N2 entered high-volume manufacturing. [S2][S8]

Q2 2026 — Revenue contribution begins

2nm represented 3% of TSMC wafer revenue. [S6]

2026 — N2 family expands

N2P and A16 extend the platform with additional performance and power improvements. [S2][S9]

What Most People Misunderstand

"2nm means a physical feature is exactly two nanometers wide."

Not in the simple literal sense implied by the marketing name.

Modern node names identify a technology generation, not one universal physical transistor dimension.

"N2 is a TSMC processor."

No.

It is a foundry process technology used to manufacture customer chips.

"A smaller node automatically makes every product better."

No.

The customer still has to design an effective chip, and the economics must justify moving to the new process.

Common Questions

Is N2 already in production?

Yes. TSMC says N2 entered high-volume manufacturing in Q4 2025. [S2][S8]

Does N2 use nanosheet transistors?

Yes. It is TSMC's first production logic generation using nanosheet technology.

What comes after N2?

N2P extends the N2 family, while A16 adds backside power delivery for selected HPC applications.

Is N2 only for AI?

No. TSMC also targets smartphone and other high-performance applications.

Evidence

  • N2 entered high-volume manufacturing in Q4 2025. [S2][S8]
  • N2 contributed 3% of Q2 2026 wafer revenue. [S6]
  • N2 is TSMC's first-generation nanosheet technology. [S2][S8]

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