Explain It in 30 Seconds
A chiplet system can be built in two broad directions:
side by side
or
stacked verticallySoIC focuses on the vertical approach.
The goal is to create:
- shorter connections;
- higher bandwidth;
- lower latency;
- smaller form factor;
- potentially lower communication power.
Where SoIC Sits in TSMC
SoIC is part of TSMC 3DFabric.
TSMC says SoIC-integrated chips can then be assembled using packaging such as CoWoS. [S12]
The Problem SoIC Solves
As systems become more complex, engineers may want to combine dies with different functions or technologies.
Putting those dies side by side creates longer communication paths.
Stacking can shorten those paths.
The high-level trade-off is:
smaller footprint
vs.
harder manufacturing
thermal complexity
stacking yield requirements
How It Works — Simple Version
SoIC uses wafer-level bonding to connect dies with very fine-pitch interconnects.
TSMC offers approaches including:
- chip-on-wafer;
- wafer-on-wafer. [S12]
The exact choice depends on:
- die size;
- yield;
- product architecture;
- cost;
- stacking requirements.
SoIC vs. CoWoS
The simplest distinction is:
SoIC
3D vertical die stacking
CoWoS
2.5D package-level integration of logic and memoryThey can be complementary rather than competing.
A vertically stacked SoIC structure can later be integrated in a larger CoWoS package. [S12]
Who Uses SoIC?
Potential applications include:
- HPC;
- AI;
- mobile;
- chiplet architectures.
TSMC's current materials emphasize both homogeneous and heterogeneous stacking. [S12]
What SoIC Depends On
3D stacking requires:
- known-good dies;
- very precise bonding;
- through-silicon-via / interconnect engineering;
- thermal control;
- testing;
- high manufacturing yield;
- design tools that understand stacked systems.
The more tightly dies are integrated, the more package and chip design become one problem.
Why SoIC Matters to TSMC
SoIC lets TSMC create value above the transistor layer.
Instead of relying only on shrinking a single die, TSMC can help customers combine multiple dies into a dense 3D system.
That gives customers another path to performance when monolithic scaling becomes more difficult or expensive.
Key Milestones
What Most People Misunderstand
"SoIC and CoWoS are the same thing."
No.
They solve related but different integration problems.
"3D stacking means putting complete packaged chips on top of one another."
Not in this context.
SoIC operates at a much denser wafer/die integration level.
"3D stacking eliminates packaging."
No.
A stacked structure still needs to be integrated into a complete package and system.
Common Questions
Evidence
Connected Entities
- TSMC
- TSMC 3DFabric
- CoWoS
- How TSMC Made Advanced Packaging Strategic